Add Chisel HDL proficiency

1 files changed, 1 insertions, 0 deletions

diff --git a/Skills.tex b/Skills.tex
index 47bcf11..fe4ac5c 100644
--- a/Skills.tex
+++ b/Skills.tex
@@ -15,6 +15,7 @@
 \begin{itemize}[noitemsep]
 \item Verilog
 \item VHDL
+\item \href{https://chisel-lang.org}{Chisel}
 \end{itemize}
 
 \columnbreak{}