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author | Karl Hallsby <karl@hallsby.com> | 2022-08-08 19:13:07 -0500 |
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committer | Karl Hallsby <karl@hallsby.com> | 2022-08-08 19:13:28 -0500 |
commit | 68090a0a24ddbf41a8970dc893399c9e21866901 (patch) | |
tree | 59015d13a9db644b4c837866b7e255043de96e24 /Experience.tex | |
parent | 5d415e2f0c9681882bab431cd7185ff75216706e (diff) |
Add Summer 2022 Northwestern REU position
Add NU command
Diffstat (limited to 'Experience.tex')
-rw-r--r-- | Experience.tex | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Experience.tex b/Experience.tex index 00d0b7f..b1f09db 100644 --- a/Experience.tex +++ b/Experience.tex @@ -1,6 +1,19 @@ % Choose a side to put dates on and stick with it throughout the document. \section{Professional Experience}\label{sec:Professional_Experience} \begin{center} + \begin{tabular}[h!]{p{11cm}r} + {\large \textbf{\NU{}}}, {\footnotesize Evanston, IL} & {\small\textsc{Jun 2022 --- Aug 2022}} \\ + \emph{Student Researcher --- \href{http://presciencelab.org/}{Prescience Lab}} & \\ + \end{tabular} +\end{center}\vspace{-12px} +\begin{itemize}[noitemsep] +\item Helped implement back-end \href{https://dl.acm.org/doi/10.5555/865063}{VCODE} code generation for an LLVM-based compiler +\item Identified \href{https://riscv.org}{RISC-V} \href{https://github.com/riscv/riscv-v-spec/releases/tag/v1.0}{V-extension} as good candidate for VCODE acceleration +\item Designed VCODE accelerator as RoCC coprocessor in \href{https://chisel-lang.org}{Chisel} and integrated with \href{https://chipyard.readthedocs.io/en/stable}{Chipyard} +\item Implemented both unit tests and baremetal full-program tests for coprocessor +\end{itemize} + +\begin{center} \begin{tabular}[h!]{p{11cm}r} {\large \textbf{\href{https://iit.edu}{\IIT{}}}}, {\footnotesize Chicago, IL} & {\small\textsc{Jun 2021 --- Aug 2021}} \\ \emph{\href{http://datasys.cs.iit.edu/grants/BigDataX/2021/index.html}{Student Researcher} --- \href{http://mystic.cs.iit.edu/}{Mystic}} & \\ |