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author | Karl Hallsby <karl@hallsby.com> | 2021-11-16 23:46:19 -0600 |
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committer | Karl Hallsby <karl@hallsby.com> | 2021-11-16 23:46:19 -0600 |
commit | 04c568bb78b74e61b1f96888e08ab1ab4cfd6d27 (patch) | |
tree | 58ae439e53ff2bb8aae9585ac596a81087aee6e1 /_posts/2021-06-10-chipyard-riscv-project.markdown | |
parent | 578cca12ad99e332b1b7bfcbab685b70003f305f (diff) |
Add small descriptions to blog posts for quick understanding
Diffstat (limited to '_posts/2021-06-10-chipyard-riscv-project.markdown')
-rw-r--r-- | _posts/2021-06-10-chipyard-riscv-project.markdown | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/_posts/2021-06-10-chipyard-riscv-project.markdown b/_posts/2021-06-10-chipyard-riscv-project.markdown index fe7a822..82ae28a 100644 --- a/_posts/2021-06-10-chipyard-riscv-project.markdown +++ b/_posts/2021-06-10-chipyard-riscv-project.markdown @@ -1,6 +1,7 @@ --- layout: post title: "Chipyard, RISC-V, and Chisel" +description: Declarative Development of RISC-V CPUs date: 2021-06-10 categories: riscv tags: RISC-V Chipyard Chisel FPGA |