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diff --git a/Research.tex b/Research.tex index b0c959f..da4a0d1 100644 --- a/Research.tex +++ b/Research.tex @@ -7,6 +7,7 @@ \item Identified \href{https://riscv.org}{RISC-V} \href{https://github.com/riscv/riscv-v-spec/releases/tag/v1.0}{V-extension} as good candidate for VCODE acceleration \item Designed VCODE accelerator as RoCC coprocessor in \href{https://chisel-lang.org}{Chisel} and integrated with \href{https://chipyard.readthedocs.io/en/stable}{Chipyard} \item Implemented both unit tests and baremetal full-program tests for coprocessor +\item Debugged design using Verilator, a cycle-accurate behavioral simulator and GTKWave, a waveform viewer \end{notopsepitemize} \subsection{Virtine Accelerator}, \Location{\IIT{}, Chicago, IL} \hfill \Daterange{2021}{06}{01}{2021}{08}{31}\\ |